by MontrosePosted on Posted in EMC Topics, Printed Circuit Board Design, Signal Integrity versus EMI — No Comments ↓
During consulting assignments, I observe that engineers sometimes struggle to achieve compliance.  This not only includes regulatory but functionality.  The more senior one is at design engineering, there is the tendency to do things in a manner that is familiar to them.  What has been known to work no longer applies with advances in technology, especially the speed of components along with higher levels of complexity in smaller packages or stacked assemblies. Time, money and extended effort are now spent to solve what is probably a simple design or layout problem that is so obvious that one cannot find it quickly.  
 
If one had knowledge on advances in semiconductor manufacturing and its effect with regard to high-speed signal integrity along with creation of unwanted common-mode current due to losses in transmission line routing, our job becomes easier.  Most EMC engineers are comfortable using a spectrum analyzer to isolate problem areas on a printed circuit board and then go into trial and error mode of fixing the problem by randomly picking out ferrite beads or a decoupling capacitor style or value without understanding what is required, or if these parts are even appropriate.
 
Whenever I get called to troubleshoot an EMI problem at the printed circuit board level, I prefer to use an oscilloscope to locate the actual source location and dig into the physics on what happened that created unwanted EMI.  If one understands the fundamentals of “EMC Made Simple“, finding a simple solution is easy.  A spectrum analyzer only tells us there is an RF field present, not what created the undesired common-mode RF energy. 
 
In order to understand circuit analysis and transmission line theory as it applies to printed circuit board design and layout in the time domain, continued education is required.  There are many places to learn this knowledge that includes seminars (even at your own expense since many employers refuse to pay for training as it affects their revenue bottom line), attendance at conferences, reading technical papers and networking with others experts in your local IEEE Chapter or other professional venues.  The manner in how you obtain continued education is up to you, as long as you stay current with technology and advanced from research on physical aspects of printed circuit board layout due to higher speed signaling.  If you are not willing to pay for training out of your own pocket, then do you deserve to be employed at a company that is willing to replace you with someone else with more knowledge, usually at lower cost?  

by MontrosePosted on Posted in EMC Topics, Printed Circuit Board Design, The Future of Engineering — No Comments ↓

During consulting assignments, I constantly see engineers struggle to achieve EMC compliance, either emissions or immunity.  This not only includes regulatory approval and functionality but also managing an in-house system that may not have been designed to include EMC and safety approvals.  They are left on their own to experiment using trail-and-error techniques because management refuses to spend a little amount of money by bringing in a consultant or to send their engineers to a training class on both theory and applied application engineering directly related to their work.

The more senior one is at in design engineering, such as digital circuitry and printed circuit board layout, there is the tendency to do things in a manner that is familiar to them.  What has been known to work in the past no longer applies due to advances in semiconductor technology and speed of operation, along with required packaging in a lightweight plastic enclosure instead of metal box.  Time, money and extended effort is required, sometimes now with several engineers instead of one to solve what is probably a simple design or layout problem.  These problems may be easy to visualize not only on the actual printed circuit board itself but also by looking at a schematic to find a design flaw such as a resistor used instead of a ferrite bead.  If one had knowledge related to advances in high-speed signal integrity along with design concerns, our job of achieving compliance becomes easier.

Most EMC engineers use only a spectrum analyzer to find problem areas on a PCB.  After spending lots of time using a sniffer probe to locate where energy is coming from, if even successful, what do they do next?  They now go again into a trial and error mode of trying fixing the problem.  Whenever I get called to troubleshoot an EMI problem (frequency domain) as a consultant at the printed circuit board level, I use an oscilloscope to locate the source in the time domain.  A spectrum analyzer only tells us there is an RF field present, not what created the undesired RF energy.  RF energy is created due to losses within a transmission line, which is commonly referred to as a trace.  It is impossible to isolate losses with a spectrum due to many second order effects that occur during layout on a physical structure; core and prepreg.

In order to understand advances in circuit analysis and transmission line theory, continued education is required.  There are many places to learn that includes seminars (even at your own expense if the company does not want to pay), attendance at conferences, reading technical papers that are free on-line and networking with others.  The manner in how you obtain continued education is up to you, as long as you stay current with technology and are willing to learn and accept new ideas that may sound bizarre.  If you are not willing to pay for training out of your own pocket to ensure job security and to make your life easier at work with quicker success, then do you deserve to be employed by a company that is willing to replace you with someone else, usually at lower cost, to increase their revenue by not providing support to them employees such as continued education?

Advertisement:  My company provide low-cost, professional training in all aspects of EMC design engineering based on EMC/EMI Made Simple as well as Maxwell Made Simple.  All classes are taught at the fundamental level which provides significant value to even senior engineers to need to learn a new way of thinking about problems due to advances in technology with a focus on transmission line theory and its relationship to EMC.

by MontrosePosted on Posted in EMC Topics, Printed Circuit Board Design, Signal Integrity versus EMI — No Comments ↓

We need to maximize the functionality of a product using printed circuit boards while at the same time shrink the physical size along with lower cost of development and production.  We are discovering that signal integrity is becoming a greater concern than EMC, especially at higher frequencies.  Although a system may radiate undesired EMI in a broadband environment, will EMI be a concern in the future or should we enhance immunity protection against any and all electromagnetic threats that may occur at the microscopic level?  

EMC engineers must understand multiple aspects of doing a printed circuit board layout in a manner that ensures not only functionality but also compliance.  The magnitude of a signal integrity problem due to losses in a transmission line is the magnitude of undesired common-mode RF current that gets developed, and which will propagate through either radiated or conducted means.  To reiterate, losses in a transmission line between source and receptor creates common-mode RF energy.  It is easier to work in the time domain instead of the frequency domain when performing circuit analysis.

A transmission line, commonly called a trace on a PCB, propagates an electromagnetic field between locations.  During propagation, there must be no loss in any parametric value of the signal if optimal signal integrity is to be ensured.  Some parametric values include changes in voltage, current, propagation delay, timing, edge rate distortion, impedance discontinuities, and the like.  If a transmission line is perfectly lossless we have optimal signal integrity and no EMI.  To help minimize signal propagation loss, RF return current must be equal and opposite to the source transmission line.  Thus, if there is any significant loss in either the source or return path, common-mode EMI is developed as this energy must still return to its source per Ampere’s law, except in an undesired transmission line path per Kirchhoff.

In the future, all engineers must understand the following sample list of signal integrity concerns, and there are many: Incorrect transmission line routing; improper terminations; power and/or return plane bounce; rise time degradation; lossy lines at higher frequencies due to board material usage; hidden parasitics (RLC); skin depth losses; dielectric loss in the board material; propagation delays due to high dielectric constant board material; crosstalk; excessive inductance in transmission line routing; delta I noise; overshoot and undershoot; IR drops; copper roughness; anisotropic aspects of the board material; and RoHS (affects delamination and may create tin whisker) to name a few parametric concerns. In essence, we can no longer consider only electromagnetic aspects of signal propagation in both the time and frequency domain, but must now become knowledgeable in material science to enhance signal integrity and minimize development of common-mode current.

by MontrosePosted on Posted in EMC Topics, Printed Circuit Board Design, Signal Integrity versus EMI — No Comments ↓
Troubleshooting printed circuit boards and systems with a focus on low-cost solutions.
There must be a source, path and receptor for an EMC event to occur.  If a radiated or conducted problem is observed during compliance testing, how do we quickly locate the source of undesired RF energy?  Many engineers will start to use a near-field probe of some sort and sniff to find where undesired energy appears to be coming from.  We sometimes use current clamps to determine if there is a  field present on cable assemblies, generally external to the system.  
 
Near-field probes help determine an approximate location of where EMI is present, but not what caused the field to be developed, only the fact it exist.  Junior EMC engineers will immediately start replacing discrete components such as decoupling capacitors at random hoping to find a solution without thinking about the problem and why it exist.  Rarely do EMC engineers have the schematic of a printed circuit board, or are able to understand logic circuity and perform  analysis at the at the component level that includes transmission line routing internal to a PCB.  Those working in the field of EMC are not logic designers nor are they experts in material science.
 
Using only a spectrum analyzer and probes to assess the magnitude of change may provide a false sense of security, since we are investigating near-field emissions which are usually different in the far field; magnetic versus electric with regard to transmission line impedance in free space.  When locating the source of RF energy, on a transmission line which many call a trace (in reality all traces are transmission lines), I prefer to use a high bandwidth oscilloscope instead of a spectrum analyzer and work in the time domain instead of frequency domain to locate losses within the transmission line.  
 
The magnitude of a signal integrity problem due to losses in any transmission line is the magnitude of common-mode current developed (per Kirchhoff’s and Ampere’s law).  Common-mode current will find a means to propagate in free space or couple to adjacent to transmission lines.  A signal integrity problem, especially at high frequencies, is usually the result of poor transmission line implementation and routing within a printed circuit board layout.  Therefore, how do we know when a propagating signal within a transmission line, if not analyzed with an oscilloscope, is the cause of an undesired propagating field if we only use a spectrum analyzer in an attempt to fix the problem?  Spectrum analyzers only tells us the presence of a field, not what caused to field to be created.  Mitigation is difficult for those not knowledgeable in logic design and transmission line routing.
 
One must be knowledgeable with transmission line theory in the time-domain as well as observing RF in the frequency domain.  Remember, in order to solve any transmission line problem, one must be comfortable using different instrumentation and tools.  If we are weak within the field of circuit design and analysis or transmission line theory, and most EMC engineers have never done logic design or created a printed circuit board, now is the time for to learn by attending public or private courses, conferences and reading textbooks.  A great resource to learn everything about the field of EMC can be discovered in my newest book, EMC Made Simple-Printed Circuit Board and System Design.
 

by MontrosePosted on Posted in Printed Circuit Board Design, The Future of Engineering — No Comments ↓

Many designers who create a printed circuit board, know little about the field of EMC.  Why should they since at the physical level, why worry, EMC is an electrical issue and not mechanical or structural.  For at least two generations, engineers will specify FR-4, because nothing else exist or they are unaware of what occurs in a physical design when using this material.  

Management mandates FR-4 because of low cost.  Fiberglass Resin (FR) has been used for decades so why change.  There are however applications and usage beyond the world of FR-4 such as military, satellite applications, harsh environmental conditions and other unique environments of use.  When using FR-4 in high frequency digital applications, should we be concerned more with electrical performance or low cost?  

One reason why FR-4 is becoming obsolete for today’s products deals not only with dielectric loss but also weave density and layout of the fiberglass strands.  There is also the RoHS  (Restriction of Hazardous Substance) Directive in Europe, China and North America.  The RoHS Directive makes the use of lead in any product illegal, which include a particular type of solder.  Typical solder consists of PbSn (60% tin-40% lead).  Since PbSn solder is now prohibited on a near world-wide basis, an alternative metallurgy material is now required which includes Nickel and other alloys.  These alloys lead to microscopic problems known as “tin whiskers”, among other items.  Over time, small metallic whiskers may grow from a soldered joint that could short out circuits causing system wide failure.  NASA has significant documentation on tin whisker growth as well as the Raytheon Corporation.  Another concern that is even greater why FR-4 is becoming obsolete for technologies of the future operating in the GHz range is that in order to use the new alloy of solder, higher processing temperatures are required to ensure melting during reflow.  With higher process temperatures, the resin used to hold the fiberglass stands together will start to evaporate water in the resin and delamination of the copper from the fiberglass core occurs.  We now a reliability concern.

Should we worry more about electrical performance for high technology products using FR-4, or just keep using low cost material because after all, quality with regard to functional operation is less important than cost?

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